0x1949 Team - FAZEMRX - MANAGER

Edit File: Kconfig

# SPDX-License-Identifier: GPL-2.0
menuconfig ARCH_VEXPRESS
	bool "ARM Ltd. Versatile Express family"
	depends on ARCH_MULTI_V7
	select ARCH_SUPPORTS_BIG_ENDIAN
	select ARM_AMBA
	select ARM_GIC
	select ARM_GLOBAL_TIMER
	select ARM_TIMER_SP804
	select GPIOLIB
	select HAVE_ARM_SCU if SMP
	select HAVE_ARM_TWD if SMP
	select HAVE_PATA_PLATFORM
	select ICST
	select NO_IOPORT_MAP
	select PLAT_VERSATILE
	select POWER_RESET
	select POWER_RESET_VEXPRESS
	select POWER_SUPPLY
	select REGULATOR if MMC_ARMMMCI
	select REGULATOR_FIXED_VOLTAGE if REGULATOR
	select VEXPRESS_CONFIG
	help
	  This option enables support for systems using Cortex processor based
	  ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
	  for example:

- CoreTile Express A5x2 (V2P-CA5s)
	  - CoreTile Express A9x4 (V2P-CA9)
	  - CoreTile Express A15x2 (V2P-CA15)
	  - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
	    (Soft Macrocell Models)
	  - Versatile Express RTSMs (Models)

You must boot using a Flattened Device Tree in order to use these
	  platforms. The traditional (ATAGs) boot method is not usable on
	  these boards with this option.

if ARCH_VEXPRESS

config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
	bool "Enable A5 and A9 only errata work-arounds"
	default y
	select ARM_ERRATA_643719 if SMP
	select ARM_ERRATA_720789
	select PL310_ERRATA_753970 if CACHE_L2X0
	help
	  Provides common dependencies for Versatile Express platforms
	  based on Cortex-A5 and Cortex-A9 processors. In order to
	  build a working kernel, you must also enable relevant core
	  tile support or Flattened Device Tree based support options.

config ARCH_VEXPRESS_DCSCB
	bool "Dual Cluster System Control Block (DCSCB) support"
	depends on MCPM
	select ARM_CCI400_PORT_CTRL
	help
	  Support for the Dual Cluster System Configuration Block (DCSCB).
	  This is needed to provide CPU and cluster power management
	  on RTSM implementing big.LITTLE.

config ARCH_VEXPRESS_SPC
	bool "Versatile Express Serial Power Controller (SPC)"
	select PM_OPP
	help
	  The TC2 (A15x2 A7x3) versatile express core tile integrates a logic
	  block called Serial Power Controller (SPC) that provides the interface
	  between the dual cluster test-chip and the M3 microcontroller that
	  carries out power management.

config ARCH_VEXPRESS_TC2_PM
	bool "Versatile Express TC2 power management"
	depends on MCPM
	select ARM_CCI400_PORT_CTRL
	select ARCH_VEXPRESS_SPC
	select ARM_CPU_SUSPEND
	help
	  Support for CPU and cluster power management on Versatile Express
	  with a TC2 (A15x2 A7x3) big.LITTLE core tile.

endif